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Press Releases : 2004

01/09/04
Matrox Leverages nSys Verification Solution for PCI Express
Press Releases : 2003
09/03/03
nSys announces the release of PCI-X nVS, a verification solution for PCI-X 2.0 in Verilog
02/18/03
nSys announces the release of PCI Express nVS-V, a verification solution for PCI Express in verilog

Press Releases : 2002
10/09/02
Synopsys announces growing industry support for OpenVera assertions
10/09/02
nSys releases PCI EXPRESS verification intellectual property based on openvera assertions
08/23/02
nSys announces the release of PCI-X nVS, a verification solution for PCI-X 2.0 in Verilog
04/15/02
OpenVera Momentum Drives Industry Adoption of a Complete Solution Around A Non-Proprietary Hardware Verification Language
04/15/02
nSys releases verification IP blocks using openVera hardware verification language

Press Releases : 2001
09/25/01
Synopsys Launches OpenVera Catalyst Program
09/11/01
nSys offers ASIC Verification Services


 


News > Press Releases : 2003



nSys announces the release of PCI-X 2.0 nVS, a verification solution for PCI-X 2.0 in Verilog

SAN JOSE, Calif., September 03, 2003 – Netsys Software Pvt. Ltd. (nSys), a solution provider for emerging standards, today announced the availability of PCI-X 2.0 nVS a verification solution for PCI-X 2.0 in Verilog. The nSys PCI-X Verification IP significantly reduces the verification time for complex system-on-chip (SoC) designs that are using the PCI-X 2.0 protocol in market segments, such as desktop, enterprise and standard servers.

“Our PCI-X 2.0 Verification IP enables customers to easily create sophisticated verification environments that simulate real world applications of PCI-X 2.0 devices,” said Atul Bhatia, Director at nSys. “As a result, customers can test the entire functionality of their PCI-X 2.0 interface without having to write a single line of code”

The PCI-X 2.0 Verification IP solution from nSys offer a rich set of features, including:

  • Support for different types of PCI-X modes: Mode 1 Parity, Mode 1 ECC, Mode 2 266 32/64 Bit, Mode 2 533 32/64 Bit
  • Support for multiple instantiation to create complex verification environment
  • Full support of automatic random, directed, error and compliance testing
  • Generates and drives bus traffic as a PCI-X Initiator and accepts split completions
  • Responds to transactions as a PCI-X 2.0 Target and initiates split completion
  • Programmable message logging capabilities
  • Implements PCI-X configuration space
  • Ability to inject protocol and parity error
  • Support for Verilog as well as VHDL implementations
  • Consistency of interface, installation, operation and documentation across nSys family of verification IP
  • Extensive support for functional coverage

For a complete listing of features and pricing of the nSys’ PCI Express, PCI-X 2.0, PCI-X 1.0, UART, Parallel 1284 and PCMCIA verification IP offerings, visit the nSys web site at http://www.nsysinc.com/products.htm

Availability
The PCI-X 2.0 Verification IP from nSys is available immediately. nSys Verification IP solutions ship with full documentation and example configurations for SoC verification environments. nSys also offers verification consulting services for IP users.

About nSys
nSys provides flexible solutions to reduce time-to-market for its customers by addressing their verification needs for SoC development. By leveraging its vast experience in standards-based product development, the nSys team creates verification solutions that solve the most challenging functional verification problems in the world. The nSys solution is in the form of services based on specialized knowledge of standards and tools or services backed by verification IP developed by nSys. To learn more, visit http://www.nsysinc.com


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