| 
| "We
were impressed by the very strong feature set of the PCI Express
nVS. Our team found the nVS to be very intuitive to use & it
had good
programmable parameters providing the desired flexibility, concise
and clear
documentation backed by very responsive & supportive engineering
team. nSys team understood our requirement and ensured that the
nVS integrated very well with our verification environment” |
|
 |
Products
> Verification
IP: nSys Verification Suites
nSys Verification Suite (nVS) family is the world's largest portfolio
of Verification IPs. Hundreds of ASIC & FPGA developers are
using the nVS family to benefit from widely accepted and proven
Bus Function Models, Monitor, Assertions based Checkers and Test
Suites for industry standard protocols.
The
nVS family has standard API as well as consistency of installation,
operation and documentation resulting in customers saving time
and effort spent on learning. The nVS leverages advanced verification
techniques in creating a versatile testbench environment.
Option of Source code in
SystemVerilog (OVM/VMM) & Verilog.
| Key
Benefits |
 |
Significant improvement
in Verification productivity |
|
Run basic chip-level
tests in less than a week & start running
full chip-level tests by end of second week |
|
Once you know
one nVS, you know how to use them all |
|
|
|
|
|
| List
of nVS |
|
PCI
family:
PCI
Express Gen2, PCI-X,
PCI,
SR-IOV |
|
ARM:
AXI,
AHB,
APB |
|
Storage:
SAS,
SATA,
ATAPI |
|
Communication:
Ethernet,
SPI
4.2,
USB
2.0 |
|
Memory:
DDR2 |
|
Others:
I2C,
UART,
SDIO,
SMBus,
PCMCIA,
IEEE1284,
ASI |
|
|
|
