Products
> Verification IP: SDIO nVS
The SDIO nVS is a comprehensive solution for pre-silicon functional
verification of designs compliant to SDIO Specifications 2.0.
The nVS allows design and verification engineers to quickly &
extensively test the entire functionality of their SDIO compliant
designs.
Availability of Test Suites enables
the designers to focus on features unique to their design. The
nVS leverages advanced verification techniques in creating a versatile
testbench environment.
Option of Source code in
SystemVerilog (OVM/VMM) & Verilog.
| Key
Benefits |
 |
Faster
and complete verification of USB designs |
|
Significant improvement
in Verification productivity |
|
Lower rate of
failure/ re-spin |
|
Flexible licensing
models |
|
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